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? 2002-2012 microchip technology inc. ds21459e-page 1 tc7129 features: ? count resolution: 19,999 ? resolution on 200 mv scale: 10 ? v ? true differential input and reference ? low power consumption: 500 ? a at 9v ? direct lcd driver for 4-1/2 digits, decimal points, low battery indicator, and continuity indicator ? overrange and underrange outputs ? range select input: 10:1 ? high common mode rejection ratio: 110 db ? external phase compensation not required applications: ? full-featured multimeters ? digital measurement devices device selection table general description: the tc7129 is a 4-1/2 digit analog-to-digital converter (adc) that directly drives a multiplexed liquid crystal display (lcd). fabricated in high-performance, low- power cmos, the tc7129 adc is designed specifi- cally for high-resolution, battery-powered digital multi- meter applications. the traditional dual-slope method of a/d conversion has been enhanced with a succes- sive integration technique to produce readings accu- rate to better than 0.005% of full-scale and resolution down to 10 ? v per count. the tc7129 includes features important to multimeter applications. it detects and indicates low battery condi- tion. a continuity output drives an annunciator on the display and can be used with an external driver to sound an audible alarm. overrange and underrange outputs, along with a range-change input, provide the ability to create auto-ranging instruments. for snapshot read- ings, the tc7129 includes a latch-and-hold input to freeze the present reading. this combination of features makes the tc7129 the ideal choice for full-featured multimeter and digital measurement applications. typical application package code pin layout package temperature range tc7129cpl normal 40-pin pdip 0 ? c to +70 ? c tc7129ckw formed 44-pin pqfp 0 ? c to +70 ? c tc7129clw ? 44-pin plcc 0 ? c to +70 ? c tc7129 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 9v + + low battery continuity v+ 5 pf 120 khz 10 pf 0.1 f 20 k 0.1 f 100 k 1 f 0.1 f 150 k 10 k v+ v in ? + * * n o t e : rc network between pins 26 and 28 is not required. 330 k 4-1/2 digit analog-to-d igital converters with on-chip lcd drivers
tc7129 ds21459e-page 2 ? 2002-2012 microchip technology inc. package types 33 34 35 36 37 38 39 13 10 9 8 7 18 19 20 21 23 24 6543 144 2 22 43 42 41 40 25 26 27 28 32 14 31 15 30 16 29 17 11 12 tc7129clw f 1 , e 1 , dp 1 b 2 , c 2 , batt a 2 , g 2 , d 2 f 2 , e 2 , dp 2 b 3 , c 3 , minus a 3 , g 3 , d 3 f 3 , e 3 , dp 3 b 4 , c 4 , bc 5 a 4 , g 4 , d 4 f 4 , e 4 , dp 4 nc ref lo ref hi in hi in lo buff c ref - c ref + common continuity int out nc a 1 , g 1 , d 1 b 1 , c 1 , cont annunciator osc3 osc1 nc osc2 dp 1 dp 2 range dgnd bp 3 bp 2 bp 1 v disp dp 4 /or nc dp 3 /ur latch/hold v+ v- int in 27 28 29 30 31 32 33 7 4 3 2 1 tc7129ckw 12 13 14 15 17 18 44 43 42 41 39 38 40 16 37 36 35 34 19 20 21 22 26 8 25 9 24 10 23 11 5 6 a 1 , g 1 , d 1 b 1 , c 1 , cont annunciator osc3 osc1 nc osc2 dp 1 dp 2 range dgnd ref lo ref hi in hi in lo buff c ref - c ref + common continuity int out nc f 1 , e 1 , dp 1 b 2 , c 2 , batt a 2 , g 2 , d 2 f 2 , e 2 , dp 2 b 3 , c 3 , minus a 3 , g 3 , d 3 f 3 , e 3 , dp 3 b 4 , c 4 , bc 5 a 4 , g 4 , d 4 f 4 , e 4 , dp 4 nc bp 3 bp 2 bp 1 v disp dp 4 /or nc dp 3 /ur latch/hold v+ v- int in tc7129cpl 40-pin pdip 44-pin qfp 44-pin plcc 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 osc2 dp 1 dp 2 range dgnd ref lo ref hi in hi in lo buff c ref - c ref + common continuity int out int in v+ v- dp 3 /ur osc1 osc3 annunicator b 1 , c 1 , cont a 1 , g 1 , d 1 f 1 , e 1 , dp 1 b 2 , c 2 , lo batt a 2 , g 2 , d 2 f 2 , e 2 , dp 2 b 3 , c 3 , minus a 3 , g 3 , d 3 f 3 , e 3 , dp 3 b 4 , c 4 , bc 5 a 4 , g 4 , d 4 f 4 , e 4 , dp 4 bp 3 bp 2 bp 1 v disp dp 4 /or display output lines latch/hold
? 2002-2012 microchip technology inc. ds21459e-page 3 tc7129 1.0 electrical characteristics absolute maximum ratings* supply voltage (v+ to v-)....................................... 15v reference voltage (ref hi or ref lo) ........ v+ to v? input voltage (in hi or in lo) (note 1) .......... v+ to v? v disp .......................................... v+ to (dgnd ? 0.3v) digital input (pins 1, 2, 19, 20, 21, 22, 27, 37, 39, 40) .......................... dgnd to v+ analog input (pins 25, 29, 30) ....................... v+ to v? package power dissipation (t a ? 70c) plastic dip ..................................................... 1.23w plcc ............................................................. 1.23w plastic qfp .................................................... 1.00w operating temperature range ............... 0c to +70c storage temperature range.............. -65c to +150c *stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the spec ifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. tc7129 electrical specifications electrical characteristics: v+ to v? = 9v, v ref = 1v, t a = +25c, f clk = 120 khz, unless otherwise indicated. pin numbers refer to 40-pin dip. symbol parameter min typ max unit test conditions input zero input reading ?0000 0000 +0000 counts v in = 0v, 200 mv scale zero reading drift ? 0.5 ? ? v/c v in = 0v, 0c < t a < +70c ratiometric reading 9996 ? 10000 counts v in = v ref = 1000 mv, range = 2v range change accuracy 0.9999 1.0000 1.0001 ratio v in = 1v on high range, v in = 0.1v on low range re rollover error ? 1 2 counts v in ? = v in + = 199 mv nl linearity error ? 1 ? counts 200mv scale cmrr common mode rejection ratio ? 110 ? db v cm = 1v, v in = 0v, 200 mv scale cmvr common mode voltage range ? (v-) + 1.5 ?vv in = 0v ? (v+) ? 1 ? v 200 mv scale e n noise (peak-to-peak value not exceeded 95% of time) ? 14? ? v p-p v in = 0v 200 mv scale i in input leakage current ? 1 10 pa v in = 0v, pins 32, 33 scale factor temperature coefficient ? 2 7 ppm/c v in = 199 mv, 0c < t a < +70c external v ref = 0 ppm/c note 1: input voltages may exceed supply voltages, provided input current is limited to 400 ? a. currents above this value may result in invalid display readings, but will not destroy the device if limited to 1 ma. dissipation ratings assume device is mounted with all leads soldered to printed circuit board.
tc7129 ds21459e-page 4 ? 2002-2012 microchip technology inc. power v com common voltage 2.8 3.2 3.5 v v+ to pin 28 common sink current ? 0.6 ? ma ? common = +0.1v common source current ? 10 ? ? a ? common = -0.1v dgnd digital ground voltage 4.5 5.3 5.8 v v+ to pin 36, v+ to v? = 9v sink current ? 1.2 ? ma ? dgnd = +0.5v supply voltage range 6 9 12 v v+ to v? i s supply current excluding common current ? 0.8 1.3 ma v+ to v? = 9v f clk clock frequency ? 120 360 khz v disp resistance ? 50 ? k ? v disp to v+ low battery flag activation voltage 6.3 7.2 7.7 v v+ to v? digital continuity comparator threshold voltages 100 200 ? mv v out pin 27 = high ? 200 400 mv v out pin 27 = low pull-down current ? 2 10 ? a pins 37, 38, 39 ?weak output? current sink/source ? 3/3 ? ? a pins 20, 21 sink/source ? 3/9 ? ? a pin 27 sink/source pin 22 source current ? 40 ? ? a pin 22 sink current ? 3 ? ? a tc7129 electrical specifications (continued) electrical characteristics: v+ to v? = 9v, v ref = 1v, t a = +25c, f clk = 120 khz, unless otherwise indicated. pin numbers refer to 40-pin dip. symbol parameter min typ max unit test conditions note 1: input voltages may exceed supply voltages, provided input current is limited to 400 ? a. currents above this value may result in invalid display readings, but will not destroy the device if limited to 1 ma. dissipation ratings assume device is mounted with all leads soldered to printed circuit board.
? 2002-2012 microchip technology inc. ds21459e-page 5 tc7129 2.0 pin descriptions descriptions of the pins are listed in table 2-1. table 2-1: pin function table pin no. 40-pin pdip pin no. 44-pin pqfp pin no. 44-pin plcc symbol function 1 40 2 osc1 input to first clock inverter. 2 41 3 osc3 output of second clock inverter. 3 42 4 annunciator backplane square wave output for driving annunciators. 443 5b 1 , c 1 , cont output to display segments. 544 6a 1 , g 1 , d 1 output to display segments. 61 7f 1 , e 1 , dp 1 output to display segments. 72 8b 2 , c 2 , lo batt output to display segments. 83 9a 2 , g 2 , d 2 output to display segments. 9410f 2 , e 2 , dp 2 output to display segments. 10 5 11 b 3 , c 3 , minus output to display segments. 11 7 13 a 3 , g 3 , d 3 output to display segments. 12 8 14 f 3 , e 3 , dp 3 output to display segments. 13 9 15 b 4 , c 4 , bc 5 output to display segments. 14 10 16 a 4 , d 4 , g 4 output to display segments. 15 11 17 f 4 , e 4 , dp 4 output to display segments. 16 12 18 bp 3 backplane #3 output to display. 17 13 19 bp 2 backplane #2 output to display. 18 14 20 bp 1 backplane #1 output to display. 19 15 21 v disp negative rail for display drivers. 20 16 22 dp 4 /or input: when high, turns on most significant decimal point. output: pulled high when result count exceeds 19,999. 21 18 24 dp 3 /ur input: second-most significant decimal point on when high. output: pulled high when result count is less than 1000. 22 19 25 latch /hold input: when floating, adc operates in free run mode. when pulled high, the last displayed reading is held. when pulled low, the result counter contents ar e shown incrementing during the de-integrate phase of cycle. output: negative going edge occurs when the data latches are updated. can be used for converter status signal. 23 20 26 v? negative power supply terminal. 24 21 27 v+ positive power supply terminal and positive rail for display drivers. 25 22 28 int in input to integrator amplifier. 26 23 29 int out output of integrator amplifier. 27 24 30 continuity input: when low, continuity flag on the display is off. when high, continuity flag is on. output: high when voltage between inputs is less than +200 mv. low when voltage between inputs is more than +200 mv. 28 25 31 common sets common mode voltage of 3.2v below v+ for de, 10x, etc. can be used as pre-regulator for external reference. 29 26 32 c ref + positive side of external reference capacitor. 30 27 33 c ref ? negative side of external reference capacitor. 31 29 35 buffer output of buffer amplifier. 32 30 36 in lo negative input voltage terminal. 33 31 37 in hi positive input voltage terminal. 34 32 38 ref hi positive reference voltage. 35 33 39 ref lo negative reference voltage
tc7129 ds21459e-page 6 ? 2002-2012 microchip technology inc. 36 34 40 dgnd internal ground reference for digital section. see section 4.2.1 ?5v power supply? . 37 35 41 range 3 ? a pull-down for 200 mv scale. pulled high externally for 2v scale. 3 8 3 6 4 2 d p 2 internal 3 ? a pull-down. when high, decimal point 2 will be on. 39 37 43 dp 1 internal 3 ? a pull-down. when high, decimal point 1 will be on. 40 38 44 osc2 output of first clock inverter. input of second clock inverter. ? 6,17, 28, 39 12, 23, 34, 1 nc no connection. table 2-1: pin function table (continued) pin no. 40-pin pdip pin no. 44-pin pqfp pin no. 44-pin plcc symbol function
? 2002-2012 microchip technology inc. ds21459e-page 7 tc7129 3.0 detailed description (all pin designations refer to 40-pin pdip.) the tc7129 is designed to be the heart of a high- resolution analog measurement instrument. the only additional components required are a few passive elements: a voltage reference, a lcd and a power source. most component values are not critical; substitutes can be chosen based on the information given below. the basic circuit for a digital multimeter application is shown in figure 3-1. see section 4.0 ?typical appli- cations? , for variations. typical values for each component are shown. the sections below give component selection criteria. 3.1 oscillator (x osc , c o1 , c o2 , r o ) the primary criterion for selecting the crystal oscillator is to choose a frequency that achieves maximum rejec- tion of line frequency noise. to do this, the integration phase should last an integral number of line cycles. the integration phase of the tc7129 is 10,000 clock cycles on the 200 mv range and 1000 clock cycles on the 2v range. one clock cycle is equal to two oscillator cycles. for 60 hz rejection, the oscillator frequency should be chosen so that the period of one line cycle equals the integration time for the 2v range. equation 3-1: this equation gives an oscillator frequency of 120 khz. a similar calculation gives an optimum frequency of 100 khz for 50 hz rejection. the resistor and capacitor values are not critical; those shown work for most applications. in some situations, the capacitor values may have to be adjusted to compensate for parasitic capacitance in the circuit. the capacitors can be low-cost ceramic devices. some applications can use a simple rc network instead of a crystal oscillator. the rc oscillator has more potential for jitter, especially in the least significant digit. see section 4.5 ?rc oscillator? . 3.2 integrating resistor (r int ) the integrating resistor sets the charging current for the integrating capacitor. choose a value that provides a current between 5 ? a and 20 ? a at 2v, the maximum full-scale input. the typical value chosen gives a charging current of 13.3 ? a: equation 3-1: too high a value for r int increases the sensitivity to noise pickup and increases errors due to leakage current. too low a value degrades the linearity of the integration, leading to inaccurate readings. 1/60 second = 16.7 msec = 1000 clock cycles *2 osc cycles/clock cycle osc frequency i charge = 2v 150 k ? 13.3 a
tc7129 ds21459e-page 8 ? 2002-2012 microchip technology inc. figure 3-1: standard circuit. 3.3 integrating capacitor (c int ) the charge stored in the integrating capacitor during the integrate phase is directly proportional to the input voltage. the primary selection criterion for c int is to choose a value that gives the highest voltage swing while remaining within the high-linearity portion of the integrator output range. an integrator swing of 2v is the recommended value. the capacitor value can be calculated using the following equation: equation 3-1: using the values derived above (assuming 60 hz operation), the equation becomes: equation 3-2: the capacitor should have low dielectric absorption to ensure good integration linearity. polypropylene and te f l o n ? capacitors are usually suitable. a good measurement of the dielectric absorption is to connect the reference capacitor across the inputs by connecting: pin-to-pin: 20 ? 33 (c ref + to in hi) 30 ? 32 (c ref ? to in lo) a reading between 10,000 and 9998 is acceptable; anything lower indicates unacceptably high dielectric absorption. 3.4 reference capacitor (c ref ) the reference capacitor stores the reference voltage during several phases of the measurement cycle. low leakage is the primary selection criterion for this com- ponent. the value must be high enough to offset the effect of stray capacitance at the capacitor terminals. a value of at least 1 ? f is recommended. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 9v + low battery continuity v+ 5 pf 120 khz 10 pf 0.1 f 20 k 0.1 f 100 k c int 0.1 f v+ v in ? + 330 k crystal r o c o2 c rf d ref r ref c if r if c ref + 1 f 10 k r bias 150 k r int osc1 osc3 annunc v disp dp 4 /or display drive outputs dp 3 /ur latch/ hold v? v+ int in int out continuity common c ref + c ref ? buff in lo in hi ref hi ref lo dgnd range dp 2 dp 1 osc2 tc7129 c o1 c int = t int x i int v swing where t int is the integration time. c int = = 0.1 ? a 16.7 msec x 13.3 ? a 2v
? 2002-2012 microchip technology inc. ds21459e-page 9 tc7129 3.5 voltage reference (d ref , r ref , r bias , c rf ) the reference potentiometer (r ref ) provides an adjustment for adjusting the reference voltage; any value above 20 k ? is adequate. the bias resistor (r bias ) limits the current through d ref to less than 150 ? a. the reference filter capacitor (c rf ) forms an rc filter with r bias to help eliminate noise. 3.6 input filter (r if , c if ) for added stability, an rc input noise filter is usually included in the circuit. the input filter resistor value should not exceed 100 k ? . a typical rc time constant value is 16.7 msec to help reject line frequency noise. the input filter capacitor should have low leakage for a high-impedance input. 3.7 battery the typical circuit uses a 9v battery as a power source. however, any value between 6v and 12v can be used. for operation from batteries with voltages lower than 6v and for operation from power supplies, see section 4.2 ?powering the tc7129? . 4.0 typical applications 4.1 tc7129 as a replacement part the tc7129 is a direct pin-for-pin replacement part for the icl7129. note, however, that the icl7129 requires a capacitor and resistor between pins 26 and 28 for phase compensation. since the tc7129 uses internal phase compensation, these parts are not required and, in fact, must be removed from the circuit for stable operation. 4.2 powering the tc7129 while the most common power source for the tc7129 is a 9v battery, there are other possibilities. some of the more common ones are explained below. 4.2.1 5v power supply measurements are made with respect to power supply ground. dgnd (pin 36) is set internally to about 5v less than v + (pin 24); it is not intended to be a power supply input and must not be tied directly to power supply ground. it can be used as a reference for external logic, as explained in section 4.3 ?connecting to external logic? , (see figure 4-1). figure 4-1: powering the tc7129 from a 5v power supply. 4.2.2 low voltage battery source a battery with voltage between 3.8v and 6v can be used to power the tc7129 when used with a voltage doubler circuit, as shown in figure 4-2. the voltage doubler uses the tc7660 dc-to-dc voltage converter and two external capacitors. figure 4-2: powering the tc7129 from a low-voltage battery. v? v+ ref hi ref lo in hi common in lo dgnd v in + ? -5v 0.1 f +5v 0.1 f 24 34 35 28 33 32 23 36 tc7129 0.1 f v? tc7129 v+ ref hi ref lo in hi common in lo dgnd 3.8v to 6v + + 10 f + 8 2 4 10 f + ? 3 tc7660 v in 5 24 34 35 28 33 32 23 36
tc7129 ds21459e-page 10 ? 2002-2012 microchip technology inc. 4.2.3 +5v power supply measurements are made with respect to power supply ground. common (pin 28) is connected to ref lo (pin 35). a voltage doubler is needed, since the supply voltage is less than the 6v minimum needed by the tc7129. dgnd (pin 36) must be isolated from power supply ground (see figure 4-3). figure 4-3: powering the tc7129 from a +5v power supply. 4.3 connecting to external logic external logic can be directly referenced to dgnd (pin 36), provided that the supply current of the external logic does not exceed the sink current of dgnd (figure 4-4). a safe value for dgnd sink current is 1.2 ma. if the sink current is expected to exceed this value, a buffer is recommended (see figure 4-5). figure 4-4: external logic referenced directly to dgnd. figure 4-5: external logic referenced to dgnd with buffer. 4.4 temperature compensation for most applications, v disp (pin 19) can be connected directly to dgnd (pin 36). for applications with a wide temperature range, some lcds require that the drive levels vary with temperature to maintain good viewing angle and display contrast. figure 4-6 shows two circuits that can be adjusted to give temperature com- pensation of about 10 mv/c between v+ (pin 24) and v disp . the diode between dgnd and v disp should have a low turn-on voltage because v disp cannot exceed 0.3v below dgnd. v? v+ dgnd + 10 f + 8 2 4 10 f + ? 3 v in 5 24 34 35 28 33 32 23 36 tc7660 v+ gnd 0.1 f 0.1 f +5v tc7129 external logic dgnd v + 36 24 23 i logic tc7129 v- ? + external logic i logic dgnd 23 24 v+ 36 tc7129 v?
? 2002-2012 microchip technology inc. ds21459e-page 11 tc7129 figure 4-6: temperature compensating circuits. 4.5 rc oscillator for applications in which 3-1/2 digit (100 ? v) resolution is sufficient, an rc oscillator is adequate. a recom- mended value for the capacitor is 51 pf. other values can be used as long as they are sufficiently larger than the circuit parasitic capacitance. the resistor value is calculated as: equation 4-1: for 120 khz frequency and c = 51 pf, the calculated value of r is 75 k ? . the rc oscillator and the crystal oscillator circuits are shown in figure 4-7. figure 4-7: oscillator circuits. 4.6 measuring techniques two important techniques are used in the tc7129: successive integration and digital auto-zeroing. successive integration is a refinement to the traditional dual-slope conversion technique. 4.7 dual-slope conversion a dual-slope conversion has two basic phases: inte- grate and de-integrate. during the integrate phase, the input signal is integrated for a fixed period of time; the integrated voltage level is thus proportional to the input voltage. during the de-integrate phase, the integrated voltage is ramped down at a fixed slope, and a counter counts the clock cycles until the integrator voltage crosses zero. the count is a measurement of the time to ramp the integrated voltage to zero and is, therefore, proportional to the input voltage being measured. this count can then be scaled and displayed as a measure- ment of the input voltage. figure 4-8 shows the phases of the dual-slope conversion. figure 4-8: dual-slope conversion. the dual-slope method has a fundamental limitation. the count can only stop on a clock cycle, so that mea- surement accuracy is limited to the clock frequency. in addition, a delay in the zero-crossing comparator can add to the inaccuracy. figure 4-9 shows these errors in an actual measurement. tc7129 + ? 1n4148 5 k 75 k 200 k 39 k 19 36 24 23 v? v+ v disp dgnd tc7129 2n2222 39 k 19 36 24 23 v? v+ v disp dgnd 20 k 18 k r = 0.45 freq * c tc7129 tc7129 1 40 2 270 k 10 pf v+ 120 khz 5 pf v+ 1 40 2 51 pf 75 k de-integrate zero crossing time integrate
tc7129 ds21459e-page 12 ? 2002-2012 microchip technology inc. figure 4-9: accuracy errors in dual-slope conversion. figure 4-10: integration waveform. integrate de-integrate time clock pulses overshoot due to zero-crossing between clock pulses integrator residue voltage overshoot caused by comparato r delay of 1 clock pulse int 1 integrate de 1 de-integrate rest x10 zero integrate and latch de 2 rest x10 de 3 zero integrate integrator residual voltage tc7129 note: shaded area greatly expanded in time and amplitude.
? 2002-2012 microchip technology inc. ds21459e-page 13 tc7129 4.8 successive integration the successive integration technique picks up where dual-slope conversion ends. the overshoot voltage shown in figure 4-9 (called the ?integrator residue voltage?) is measured to obtain a correction to the initial count. figure 4-10 shows the cycles in a successive integration measurement. the waveform shown is for a negative input signal. the sequence of events during the measurement cycle is shown in table 4-1. table 4-1: measurement cycle sequence 4.9 digital auto-zeroing to eliminate the effect of amplifier offset errors, the tc7129 uses a digital auto-zeroing technique. after the input voltage is measured as described above, the measurement is repeated with the inputs shorted internally. the reading with inputs shorted is a measurement of the internal errors and is subtracted from the previous reading to obtain a corrected measurement. digital auto-zeroing eliminates the need for an external auto-zeroing capacitor used in other adcs. 4.10 inside the tc7129 figure 4-11 shows a simplified block diagram of the tc7129. phase description int 1 input signal is integrated for fixed time (1000 clock cycles on 2v scale, 10,000 on 200 mv). de 1 integrator voltage is ramped to zero. counter counts up until zero-crossing to produce reading accurate to 3-1/2 digits. residue represents an overshoot of the actual input voltage. rest rest; circuit settles. x10 residue voltage is amplified 10 times and inverted. de 2 integrator voltage is ramped to zero. counter counts down until zero-crossing to correct reading to 4-1/2 digits. residue represents an undershoot of the actual input voltage. rest rest; circuit settles. x10 residue voltage is amplified 10 times and inverted. de 3 integrator voltage is ramped to zero. counter counts up until zero-crossing to correct reading to 5-1/2 digits. residue is discarded.
tc7129 ds21459e-page 14 ? 2002-2012 microchip technology inc. figure 4-11: tc7129 functional block diagram. figure 4-12: integrator block diagram. low battery continuity segment drives backplane drives latch, decode display multiplexer up/down results counter sequence counter/decoder control logic analog section osc1 osc2 osc3 range l/h cont v+ v? dgnd common in hi in lo buff dp 1 dp 2 ur/dp 3 or/dp 4 ref hi ref lo int out int in annunciator drive v disp tc7129 common ref hi buffer integrator de zi, x10 comparator 1 200 mv c ref r int c int int 1 in hi + ? ? + ? + ref lo de in lo ? + de- de+ de+ de? 100 pf v ? + continuity int 1 , int 2 continuity comparator 500 k rest to display driver 10 pf comparator 2 to digital section tc7129 int x10
? 2002-2012 microchip technology inc. ds21459e-page 15 tc7129 4.11 integrator section the integrator section includes the integrator, compar- ator, input buffer amplifier and analog switches (see table 4-2) used to change the circuit configuration during the separate measurement phases described earlier. (see figure 4-12). the buffer amplifier has a common mode input voltage range from 1.5v above v? to 1v below v+. the integra- tor amplifier can swing to within 0.3v of the rails. however, for best linearity, the swing is usually limited to within 1v. both amplifiers can supply up to 80 ? a of output current, but should be limited to 20 ? a for good linearity. 4.12 continuity indicator a comparator with a 200 mv threshold is connected between in hi (pin 33) and in lo (pin 32). whenever the voltage between inputs is less than 200 mv, the continuity output (pin 27) will be pulled high, activating the continuity annunciator on the display. the continuity pin can also be used as an input to drive the continuity annunciator directly from an external source (see figure 4-13). a schematic of the input/output nature of this pin is also shown in figure 4-14. figure 4-13: continuity indicator circuit. figure 4-14: input/output pin schematic. 4.13 common and digital ground the common and digital ground (dgnd) outputs are generated from internal zener diodes. the voltage between v+ and dgnd is the internal supply voltage for the digital section of the tc7129. common can source approximately 12 ? a; dgnd has essentially no source capability (see figure 4-15). table 4-2: switch legends label description label meaning. de open during all de-integrate phases. de? closed during all de- integrate phases when input voltage is negative. de+ closed during all de- integrate phases when input voltage is positive. int 1 closed during the first integrate phase (measurement of the input voltage). int 2 closed during the second integrate phase (measurement of the amplifier offset). int open during both integrate phases. rest closed during the rest phase. zi closed during the zero integrate phase. x10 closed during the x10 phase. x10 open during the x10 phase. com buffer 200 mv in hi ? + in lo ? + v cont 500 k to display driver (not latched) tc7129 tc7129 500 k dp 4 /or, pin 20 dp 3 /ur, pin 21 latch/hold pin 22 continuity, pin 27
tc7129 ds21459e-page 16 ? 2002-2012 microchip technology inc. figure 4-15: digital ground (dgnd) and common outputs. 4.14 low battery the low battery annunciator turns on when supply volt- age between v? and v+ drops below 6.8v. the internal zener diode has a threshold of 6.3v. when the supply voltage drops below 6.8v, the transistor tied to v? turns off pulling the ?low battery? point high. 4.15 sequence and results counter a sequence counter and associated control logic pro- vide signals that operate the analog switches in the integrator section. the comparator output from the inte- grator gates the results counter. the results counter is a six-section up/down decade counter that holds the intermediate results from each successive integration. 4.16 overrange and underrange outputs when the results counter holds a value greater than 19,999, the dp 4 /or output (pin 20) is driven high. when the results counter value is less than 1000, the dp 3 /ur output (pin 21) is driven high. both signals are valid on the falling edge of latch /hold (l /h) and do not change until the end of the next conversion cycle. the signals are updated at the end of each conversion, unless the l /h input (pin 22) is held high. pins 20 and 21 can also be used as inputs for external control of decimal points 3 and 4. figure 4-14 shows a schematic of the input/output nature of these pins. 4.17 latch /hold the l /h output goes low during the last 100 cycles of each conversion. this pulse latches the conversion data into the display driver section of the tc7129. this pin can also be used as an input. when driven high, the display will not be updated; the previous reading is displayed. when driven low, the display reading is not latched; the sequence counter reading will be displayed. since the counter is counting much faster than the backplanes are being updated, the reading shown in this mode is somewhat erratic. 4.18 display driver the tc7129 drives a triplexed lcd with three back- planes. the lcd can include decimal points, polarity sign and annunciators for continuity and low battery. figure 4-16 shows the assignment of the display segments to the backplanes and segment drive lines. the backplane drive frequency is obtained by dividing the oscillator frequency by 1200. this results in a back- plane drive frequency of 100 hz for 60 hz operation (120 khz crystal) and 83.3 hz for 50 hz operation (100 khz crystal). backplane waveforms are shown in figure 4-17. these appear on outputs bp 1 , bp 2 , bp 3 (pins 16, 17 and 18). they remain the same, regardless of the segments being driven. other display output lines (pins 4 through 15) have waveforms that vary depending on the displayed values. figure 4-18 shows a set of waveforms for the a, g, d outputs (pins 5, 8, 11 and 14) for several combinations of ?on? segments. the annunciator drive output (pin 3) is a square wave, running at the backplane frequency (100 hz or 83.3 hz) with a peak-to-peak voltage equal to dgnd voltage. connecting an annunciator to pin 3 turns it on; connecting it to its backplane turns it off. + ? 12 a p tc7129 logic section 5v 3.2v n n v+ v? com dgnd 24 28 36 23
? 2002-2012 microchip technology inc. ds21459e-page 17 tc7129 figure 4-16: display segment assignments. figure 4-17: backplane waveforms. figure 4-18: typical display output waveforms. bp 1 bp 2 bp 3 low battery low battery continuity f 4 , e 4 , dp 4 a 4 , g 4 , d 4 b 4 , c 4 , bc 4 f 3 , e 3 , dp 3 a 3 , g 3 , d 3 b 3 , c 3 , minus b 1 , c 1 , continuity a 1 , g 1 , d 1 f 1 , e 1 , dp 1 b 2 , c 2 , low battery a 2 , g 2 , d 2 backplane connections f 2 , e 2 , dp 2 continuity bp 1 bp 2 bp 3 v dd v h v l v disp v dd v h v l v disp v dd v h v l v disp v dd v h v l v disp b segment line all off a segment on d, g off a, g on d off all on
tc7129 ds21459e-page 18 ? 2002-2012 microchip technology inc. 5.0 packaging information 5.1 package marking information package marking data not available a this time. 5.2 taping forms user direction of feed p, pitch s tandard r eel component orientation reverse reel component orientation w, width of c arrier tape pin 1 pin 1 component taping orientation for 44-pin pqfp devices user direction of feed pin 1 standard reel component orientation for 713 suffix device w p package carrier width (w) pitch (p) part per full reel reel size 44-pin pqfp 24 mm 16 mm 500 13 in carrier tape, number of components per reel and reel size note: drawing does not represent total number of pins.
? 2002-2012 microchip technology inc. ds21459e-page 19 tc7129 40-lead plastic dual in-line (p) ? 600 mil body (pdip) 15 10 5 15 10 5 ? mold draft angle bottom 15 10 5 15 10 5 ? mold draft angle top 17.27 16.51 15.75 .680 .650 .620 eb overall row spacing 0.56 0.46 0.36 .022 .018 .014 b lower lead width 1.78 1.27 0.76 .070 .050 .030 b1 upper lead width 0.38 0.29 0.20 .015 .012 .008 c lead thickness 3.43 3.30 3.05 .135 .130 .120 l tip to seating plane 52.45 52.26 51.94 2.065 2.058 2.045 d overall length 14.22 13.84 13.46 .560 .545 .530 e1 molded package width 15.88 15.24 15.11 .625 .600 .595 e shoulder to shoulder width 0.38 .015 a1 base to seating plane 4.06 3.81 3.56 .160 .150 .140 a2 molded package thickness 4.83 4.45 4.06 .190 .175 .160 a top to seating plane 2.54 .100 p pitch 40 40 n number of pins max nom min max nom min dimension limits millimeters inches * units a2 1 2 d n e1 c ? eb e ? p l b b1 a a1 * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per si de. jedec equivalent: mo-011 drawing no. c04-016 significant characteristic note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
tc7129 ds21459e-page 20 ? 2002-2012 microchip technology inc. 44-lead plastic leaded chip carrier (lw) ? square (plcc) ch2 x 45 ? ch1 x 45 ? 10 5 0 10 5 0 ? mold draft angle bottom 10 5 0 10 5 0 ? mold draft angle top 0.53 0.51 0.33 .021 .020 .013 b 0.81 0.74 0.66 .032 .029 .026 b1 upper lead width 0.33 0.27 0.20 .013 .011 .008 c lead thickness 11 11 n1 pins per side 16.00 15.75 14.99 .630 .620 .590 d2 footprint length 16.00 15.75 14.99 .630 .620 .590 e2 footprint width 16.66 16.59 16.51 .656 .653 .650 d1 molded package length 16.66 16.59 16.51 .656 .653 .650 e1 molded package width 17.65 17.53 17.40 .695 .690 .685 d overall length 17.65 17.53 17.40 .695 .690 .685 e overall width 0.25 0.13 0.00 .010 .005 .000 ch2 corner chamfer (others) 1.27 1.14 1.02 .050 .045 .040 ch1 corner chamfer 1 0.86 0.74 0.61 .034 .029 .024 a3 side 1 chamfer height 0.51 .020 a1 standoff a2 molded package thickness 4.57 4.39 4.19 .180 .173 .165 a overall height 1.27 .050 p pitch 44 44 n number of pins max nom min max nom min dimension limits millimeters inches * units ? a2 c e2 2 d d1 n #leads=n1 e e1 1 ? p a3 a 35 ? b1 b d2 a1 .145 .153 .160 3.68 3.87 4.06 .028 .035 0.71 0.89 lower lead width * controlling parameter notes: dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010? (0.254mm) per si de. jedec equivalent: mo-047 drawing no. c04-048 significant characteristic note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2002-2012 microchip technology inc. ds21459e-page 21 tc7129 44-lead plastic quad flatpack (kw) 10x10x2.0 mm body, 1.95/0.25 mm lead form (pqfp) chamfer varies d e1 e p c b d1 n l 2 1 f a1 a a2 ? ? ? 1.95 ref. .077 ref. f footprint units inches millimeters * dimension limits min nom max min nom max number of pins n 44 44 pitch p .031 bsc 0.80 bsc overall height a - - .096 - - 2.45 molded package thickness a2 .077 .079 .083 1.95 2.00 2.10 standoff a1 .010 - - 0.25 - - foot length l .029 .035 .041 0.73 0.88 1.03 foot angle ? 0 3.5 7 0 3.5 7 overall width e .547 bsc 13.90 bsc overall length d .547 bsc 13.90 bsc molded package width e1 .394 bsc 10.00 bsc molded package length d1 .394 bsc 10.00 bsc lead thickness c .004 - .009 0.11 - 0.23 lead width b .012 - .018 0.30 - 0.45 mold draft angle top ? 5 - 16 5 - 16 mold draft angle bottom ? 5 - 16 5 - 16 dimensions d and e1 do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010" (0.254mm) per s ide. notes: jedec equivalent: mo-112 aa-1 revised 07-21-05 * controlling parameter significant characteristic bsc: basic dimension. theoretically exact value shown without tolerances. ref: reference dimension, usually without tolerance, for information purposes only. see asme y14.5m see asme y14.5m drawing no. c04-119 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
tc7129 ds21459e-page 22 ? 2002-2012 microchip technology inc. 6.0 revision history revision e (december 2012) added a note to each package outline drawing.
? 2002-2012 microchip technology inc. ds21459e-page 23 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: dstemp: 4-1/2 digit analog-to-digital converter temperature: c = 0c to +70c i = -25c to +85c package: pl = 40-pin pdip kw = 40-pin pqfp lw = 44-pin plcc jl = 40-pin cdip taping direction: 713 = standard taping part no. xx pkg device x tem p. xx taping direction examples: a) tc7129cpl: 40-pin pdip b) DSTEMPCKW713: 44-pin pqfp tape and reel c) dstempclw: 44-pin plcc
ds21459e-page 24 ? 2002-2012 microchip technology inc. notes:
? 2002-2012 microchip technology inc. ds21459e-page 25 the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under ?support?, click on ?customer change notification? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support
ds21459e-page 26 ? 2002-2012 microchip technology inc. reader response it is our intention to provide you with the best documentation possible to ensure successful use of your microchip product. if you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation can better serve you, please fax your comments to the technical publications manager at (480) 792-4150. please list the following information, and use this outline to provide us with your comments about this document. to: technical publications manager re: reader response total pages sent ________ from: name company address city / state / zip / country telephone: (_______) _________ - _________ application (optional): would you like a reply? y n device: literature number: questions: fax: (______) _________ - _________ ds21459e 1. what are the best features of this document? 2. how does this document meet your hardware and software development needs? 3. do you find the organization of this document easy to follow? if not, why? 4. what additions to the document do you think would enhance the structure and subject? 5. what deletions from the document could be made without affecting the overall usefulness? 6. is there any incorrect or misleading information (what and where)? 7. how would you improve this document?
? 2002-2012 microchip technology inc. ds21459e-page 27 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, flashflex, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mtp, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. analog-for-the-digital age, app lication maestro, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mpf, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, sqi, serial quad i/o, total endurance, tsharc, uniwindriver, wiperlock, zena and z-scale are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. gestic and ulpp are registered trademarks of microchip technology germany ii gmbh & co. & kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2002-2012, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 9781620768389 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 ==
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